From 9580fa10ca97300ed2219cf7551b034951c96c94 Mon Sep 17 00:00:00 2001
From: Maix0 <39835848+Maix0@users.noreply.github.com>
Date: Thu, 16 Apr 2026 10:19:32 +0200
Subject: [PATCH] feat(ex01): use actual register bit names

---
 ex01/timer.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/ex01/timer.c b/ex01/timer.c
index 9ecebf9..c077150 100644
--- a/ex01/timer.c
+++ b/ex01/timer.c
@@ -8,7 +8,7 @@
 #define TIMER_FREQ (F_CPU / PRESCALER)
 
 // at a high level:
-// Set the OC1B (PB2) pin as output
+// Set the OC1A (PB1) pin as output
 // set the TIMER1 mode to COMPARE (CTC)
 // say to compare against OC1A
 // set the value to be compated at X count
@@ -22,7 +22,7 @@ void timer1_init(void) {
 	// CTC mode (WGM12 = 1)
 	TCCR1B |= _BV(WGM12);
 
-	// Toggle OC1B on compare match (COM1B0 = 1)
+	// Toggle OC1A on compare match (COM1B0 = 1)
 	TCCR1A |= _BV(COM1A0);
 
 	// Set compare values
@@ -32,9 +32,9 @@ void timer1_init(void) {
 	TCCR1B |= _BV(CS12) | _BV(CS10);
 	
 	// set OCR1A interrupt
-	TIMSK1 = _BV(1);
+	TIMSK1 |= _BV(OCIE1A);
 
 
 	// HELLO NO `sei()` SO WE DO IT BY HAND
-	SREG |= (1 << 7);
+	SREG |= _BV(SREG_I);
 }