chore(macros/ex02): used homebrew BV macro and fixed ex02 to use timer interupt

This commit is contained in:
Maix0 2026-04-19 15:38:04 +02:00
parent 508ba6e857
commit 29b0d72ff9
17 changed files with 191 additions and 200 deletions

View file

@ -8,29 +8,29 @@
static inline void t1_init_fpwm_14(e_timer_prescaler prescaler) {
// Fast PWM (8-bit): WGM22:0 = 0b011
TCCR1A = _BV(WGM11) | _BV(WGM12);
TCCR1B = _BV(WGM13);
TCCR1A = BV(WGM11) | BV(WGM12);
TCCR1B = BV(WGM13);
// set the correct prescaler
switch (prescaler) {
case (PRESCALER_1): {
TCCR1B |= (_BV(CS10));
TCCR1B |= (BV(CS10));
break;
}
case (PRESCALER_8): {
TCCR1B |= (_BV(CS11));
TCCR1B |= (BV(CS11));
break;
}
case (PRESCALER_64): {
TCCR1B |= (_BV(CS11) | _BV(CS10));
TCCR1B |= (BV(CS11) | BV(CS10));
break;
}
case (PRESCALER_256): {
TCCR1B |= (_BV(CS12));
TCCR1B |= (BV(CS12));
break;
}
case (PRESCALER_1024): {
TCCR1B |= (_BV(CS12) | _BV(CS10));
TCCR1B |= (BV(CS12) | BV(CS10));
break;
}
case (PRESCALER_OFF): {
@ -41,29 +41,29 @@ static inline void t1_init_fpwm_14(e_timer_prescaler prescaler) {
static inline void t1_init_ctc_4(e_timer_prescaler prescaler) {
// CTC mode 4
TCCR1A = _BV(WGM12);
TCCR1A = BV(WGM12);
TCCR1B = 0;
// set the correct prescaler
switch (prescaler) {
case (PRESCALER_1): {
TCCR1B |= (_BV(CS10));
TCCR1B |= (BV(CS10));
break;
}
case (PRESCALER_8): {
TCCR1B |= (_BV(CS11));
TCCR1B |= (BV(CS11));
break;
}
case (PRESCALER_64): {
TCCR1B |= (_BV(CS11) | _BV(CS10));
TCCR1B |= (BV(CS11) | BV(CS10));
break;
}
case (PRESCALER_256): {
TCCR1B |= (_BV(CS12));
TCCR1B |= (BV(CS12));
break;
}
case (PRESCALER_1024): {
TCCR1B |= (_BV(CS12) | _BV(CS10));
TCCR1B |= (BV(CS12) | BV(CS10));
break;
}
case (PRESCALER_OFF): {
@ -82,23 +82,23 @@ static inline void t1_set_icr1(uint16_t value) {
static inline void t1_overflow_interrupt(bool enable) {
if (enable)
TIMSK1 |= _BV(TOIE1);
TIMSK1 |= BV(TOIE1);
else
TIMSK1 &= ~_BV(TOIE1);
TIMSK1 &= ~BV(TOIE1);
}
static inline void t1_interrupt(enum e_timer_output output, bool enable) {
if (output & TO_A) {
if (enable)
TIMSK1 |= _BV(OCIE1A);
TIMSK1 |= BV(OCIE1A);
else
TIMSK1 &= ~_BV(OCIE1A);
TIMSK1 &= ~BV(OCIE1A);
}
if (output & TO_B) {
if (enable)
TIMSK1 |= _BV(OCIE1B);
TIMSK1 |= BV(OCIE1B);
else
TIMSK1 &= ~_BV(OCIE1B);
TIMSK1 &= ~BV(OCIE1B);
}
}
@ -111,41 +111,41 @@ static inline void t1_set_ocr(enum e_timer_output output, uint16_t value) {
static inline void t1_set_out_mode(enum e_timer_output output, enum e_timer_output_mode mode) {
if (output & TO_A) {
TCCR1A &= ~(_BV(COM1A1) | _BV(COM1A0));
TCCR1A &= ~(BV(COM1A1) | BV(COM1A0));
switch (mode) {
case (TOM_00): {
break;
}
case (TOM_10): {
TCCR1A |= (_BV(COM1A1));
TCCR1A |= (BV(COM1A1));
break;
}
case (TOM_01): {
TCCR1A |= (_BV(COM1A0));
TCCR1A |= (BV(COM1A0));
break;
}
case (TOM_11): {
TCCR1A |= (_BV(COM1A1) | _BV(COM1A0));
TCCR1A |= (BV(COM1A1) | BV(COM1A0));
break;
}
}
}
if (output & TO_B) {
TCCR1A &= ~(_BV(COM1B1) | _BV(COM1B0));
TCCR1A &= ~(BV(COM1B1) | BV(COM1B0));
switch (mode) {
case (TOM_00): {
break;
}
case (TOM_10): {
TCCR1A |= (_BV(COM1B1));
TCCR1A |= (BV(COM1B1));
break;
}
case (TOM_01): {
TCCR1A |= (_BV(COM1B0));
TCCR1A |= (BV(COM1B0));
break;
}
case (TOM_11): {
TCCR1A |= (_BV(COM1B1) | _BV(COM1B0));
TCCR1A |= (BV(COM1B1) | BV(COM1B0));
break;
}
}