feat(ex02): done

This commit is contained in:
Maix0 2026-04-24 14:43:35 +02:00
parent b7580c043c
commit 0fe7dbdc0f
23 changed files with 1469 additions and 0 deletions

74
ex02/include/adc.h Normal file
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#ifndef ADC_H
#define ADC_H
#include <avr/io.h>
#include "mystd.h"
typedef enum e_adc_ref {
ADC_AREF = 0,
ADC_AVCC = BV(REFS0),
ADC_INT = BV(REFS0) | BV(REFS1),
_ADC_REF_MASK = BV(REFS0) | BV(REFS1),
} e_adc_ref;
typedef enum e_adc_size {
ADC_10BIT = 0,
ADC_8BIT = BV(ADLAR),
_ADC_SIZE_MASK = BV(ADLAR),
} e_adc_size;
typedef enum e_adc_prescaler {
ADC_PRESCALER_2 = BV(ADPS0),
ADC_PRESCALER_4 = BV(ADPS1),
ADC_PRESCALER_8 = BV(ADPS1) | BV(ADPS0),
ADC_PRESCALER_16 = BV(ADPS2),
ADC_PRESCALER_32 = BV(ADPS2) | BV(ADPS0),
ADC_PRESCALER_64 = BV(ADPS2) | BV(ADPS1),
ADC_PRESCALER_128 = BV(ADPS2) | BV(ADPS1) | BV(ADPS0),
_ADC_PRESCALER_MASK = BV(ADPS2) | BV(ADPS1) | BV(ADPS0),
} e_adc_prescaler;
typedef enum e_adc_input {
ADC_ADC0 = 0,
ADC_ADC1 = BV(MUX0),
ADC_ADC2 = BV(MUX1),
ADC_ADC3 = BV(MUX0) | BV(MUX1),
ADC_ADC4 = BV(MUX2),
ADC_ADC5 = BV(MUX2) | BV(MUX0),
ADC_ADC6 = BV(MUX2) | BV(MUX1),
ADC_ADC7 = BV(MUX2) | BV(MUX1) | BV(MUX0),
ADC_TEMP = BV(MUX3),
ADC_11V = BV(MUX3) | BV(MUX2) | BV(MUX1),
ADC_0V = BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0),
_ADC_INPUT_MASK = BV(MUX0) | BV(MUX1) | BV(MUX2) | BV(MUX3),
} e_adc_input;
static inline uint8_t adc_read_pin(e_adc_input input) {
ADMUX = (ADMUX & ~(_ADC_INPUT_MASK | _ADC_SIZE_MASK)) | input | BV(ADLAR);
ADCSRA |= BV(ADSC);
while (ADCSRA & BV(ADSC))
;
return ADCH;
}
static inline uint16_t adc_read_pin_10bit(e_adc_input input) {
ADMUX = (ADMUX & ~(_ADC_SIZE_MASK | _ADC_INPUT_MASK)) | (input & _ADC_INPUT_MASK);
ADCSRA |= BV(ADSC);
while (ADCSRA & BV(ADSC))
;
return ADC;
}
static inline void adc_init(e_adc_ref v_ref, e_adc_prescaler prescaler) {
ADMUX = (ADMUX & ~(_ADC_REF_MASK)) | v_ref;
ADCSRA = BV(ADEN) | (prescaler & _ADC_PRESCALER_MASK);
(void)adc_read_pin(0);
}
#endif /* ADC_H */

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#ifndef AHT20_H
#define AHT20_H
#include <avr/io.h>
typedef struct aht20_reading {
float temperature;
float humidity;
} aht20_reading;
aht20_reading aht20_read_measure(void);
uint8_t aht20_status(void);
void aht20_init(void);
void aht20_print_status(uint8_t status);
void aht20_trigger(void);
#define AHT20 (0x38)
#endif /* AHT20_H */

40
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#ifndef APA102_H
#define APA102_H
#include <avr/io.h>
#include "mystd.h"
#include "spi.h"
typedef struct rgb {
uint8_t r;
uint8_t g;
uint8_t b;
} rgb;
static inline void apa102_set_colors(rgb col[], uint8_t brightness[], uint8_t length) {
// start frame
for (uint8_t i = 0; i < 4; i++)
spi_write(0x00);
// led data
for (uint8_t i = 0; i < length; i++) {
spi_write(0xE0 + (brightness[i] & 31));
spi_write(col[i].b);
spi_write(col[i].g);
spi_write(col[i].r);
}
// reset frame
for (uint8_t i = 0; i < 4; i++)
spi_write(0x00);
// End frame: 8+8*(leds >> 4) clock cycles
for (uint8_t i = 0; i < length; i += 16) {
spi_write(0x00); // 8 more clock cycles
}
}
static inline void apa102_set_color(rgb col, uint8_t brightness) {
apa102_set_colors(&col, &brightness, 1);
}
#endif /* APA102_H */

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#ifndef EEPROM_H
#define EEPROM_H
#include <avr/io.h>
#include "interupt.h"
#include "mystd.h"
static inline void eeprom_wait(void) {
while (EECR & BV(EEPE))
;
}
static inline void eeprom_write_single_nocheck(uint16_t addr, uint8_t data) {
uint8_t sreg_save = SREG;
my_cli();
// wait until eeprom is good to go !
eeprom_wait();
while (SPMCSR & BV(SPMEN))
;
// setup the (addr, data) pair
EEAR = addr;
EEDR = data;
// we set the EEPROM master write bit
EECR = (EECR & ~BV(EEPE)) | BV(EEMPE);
// within four cpu cycle, we need to set the EEPROM write bit, otherwise the writes doesnt work
// why 4 ? -> the master bit is reset after 4 cycles, and you need both to actually write
EECR |= BV(EEPE);
// this is the exact setup written in p32
// here the write should be done
SREG = sreg_save;
}
static inline uint8_t eeprom_read_single(uint16_t addr) {
uint8_t sreg_save = SREG;
my_cli();
eeprom_wait();
EEAR = addr;
EECR |= BV(EERE);
SREG = sreg_save;
return EEDR;
}
// true on error
static inline bool eeprom_write_single(uint16_t addr, uint8_t data) {
if (eeprom_read_single(addr) != data)
eeprom_write_single_nocheck(addr, data);
return (eeprom_read_single(addr) != data);
}
// true on error
static inline bool eeprom_write(uint16_t addr, const uint8_t* data, uint16_t length) {
for (uint16_t i = 0; i < length; i++) {
if (eeprom_write_single(addr + i, data[i]))
return true;
}
return false;
}
static inline void eeprom_read(uint16_t addr, uint8_t* data, uint16_t length) {
for (uint16_t i = 0; i < length; i++)
data[i] = eeprom_read_single(addr + i);
}
#endif /* EEPROM_H */

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#ifndef I2C_H
#define I2C_H
#include <avr/io.h>
#include <util/twi.h>
#define PCA9555_ADDR_OTHER 0b0100111
#define PCA9555_ADDR_SELF 0b0100000
#define REG_INPUT_PORT0 0x00
#define REG_INPUT_PORT1 0x01
#define REG_OUTPUT_PORT0 0x02
#define REG_OUTPUT_PORT1 0x03
#define REG_CONFIG_PORT0 0x06
#define REG_CONFIG_PORT1 0x07
#define I2C_CLOCK 100000UL
#define I2C_ADDR(ADDR, RW) ((ADDR) << 1 | (RW & 1))
void i2c_init(void);
void i2c_start(void);
void i2c_stop(void);
void i2c_write(uint8_t);
uint8_t i2c_read_nack(void);
uint8_t i2c_read_ack(void);
uint8_t pca9555_read(uint8_t addr, uint8_t reg);
void pca9555_write(uint8_t addr, uint8_t reg, uint8_t value);
static inline void pca9555_set_output(uint8_t addr, uint8_t port, uint8_t mask) {
uint8_t cfg = pca9555_read(addr, port);
cfg &= ~mask;
pca9555_write(addr, port, cfg);
}
static inline void pca9555_set_low(uint8_t addr, uint8_t port, uint8_t mask) {
uint8_t out = pca9555_read(addr, port);
out &= ~mask; // clear bit
pca9555_write(addr, port, out);
}
static inline void pca9555_set_high(uint8_t addr, uint8_t port, uint8_t mask) {
uint8_t out = pca9555_read(addr, port);
out |= mask; // set bit;
pca9555_write(addr, port, out);
}
static inline void pca9555_toggle(uint8_t addr, uint8_t port, uint8_t mask) {
uint8_t out = pca9555_read(addr, port);
out ^= mask;
pca9555_write(addr, port, out);
}
#endif /* I2C_H */

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#ifndef INTERUPT_H
#define INTERUPT_H
#include <avr/io.h>
#include "mystd.h"
static inline void my_sei(void) {
SREG |= BV(SREG_I);
}
static inline void my_cli(void) {
SREG &= ~BV(SREG_I);
}
#endif /* INTERUPT_H */

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#ifndef MYSTDINT_H
#define MYSTDINT_H
#include <avr/io.h>
typedef unsigned char uint8_t;
typedef signed char int8_t;
typedef uint8_t bool;
#define true (1)
#define false (0)
#define BV(bit) (1 << bit)
#ifndef NULL
#define NULL ((void*)0)
#endif
#endif /* MYSTDINT_H */

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#ifndef RGB_H
#define RGB_H
#include "mystd.h"
void init_rgb(void);
void set_rgb(uint8_t r, uint8_t g, uint8_t b);
#endif /* RGB_H */

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#ifndef SPI_H
#define SPI_H
#define SPI_DDR DDRB
#define CS PINB2
#define MOSI PINB3
#define MISO PINB4
#define SCK PINB5
#include "mystd.h"
void spi_init(void);
void spi_write(uint8_t data);
uint8_t spi_read(void);
#endif /* SPI_H */

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#ifndef TIMER0_H
# define TIMER0_H
# include <avr/io.h>
# include "mystd.h"
# include "timer_global.h"
static inline void t0_init_ctc_2(e_timer_prescaler prescaler) {
// Fast PWM (8-bit): WGM22:0 = 0b011
TCCR0A = BV(WGM01);
// reset to zero -> timer off
TCCR0B &= ~(BV(CS02) | BV(CS01) | BV(CS00));
// set the correct prescaler
switch (prescaler) {
case (PRESCALER_1): {
TCCR0B |= (BV(CS00));
break;
}
case (PRESCALER_8): {
TCCR0B |= (BV(CS01));
break;
}
case (PRESCALER_64): {
TCCR0B |= (BV(CS01) | BV(CS00));
break;
}
case (PRESCALER_256): {
TCCR0B |= (BV(CS02));
break;
}
case (PRESCALER_1024): {
TCCR0B |= (BV(CS02) | BV(CS00));
break;
}
case (PRESCALER_OFF): {
break;
}
}
}
static inline void t0_init_fpwm_3(e_timer_prescaler prescaler) {
// Fast PWM (8-bit): WGM22:0 = 0b011
TCCR0A = BV(WGM00) | BV(WGM01);
// reset to zero -> timer off
TCCR0B &= ~(BV(CS02) | BV(CS01) | BV(CS00));
// set the correct prescaler
switch (prescaler) {
case (PRESCALER_1): {
TCCR0B |= (BV(CS00));
break;
}
case (PRESCALER_8): {
TCCR0B |= (BV(CS01));
break;
}
case (PRESCALER_64): {
TCCR0B |= (BV(CS01) | BV(CS00));
break;
}
case (PRESCALER_256): {
TCCR0B |= (BV(CS02));
break;
}
case (PRESCALER_1024): {
TCCR0B |= (BV(CS02) | BV(CS00));
break;
}
case (PRESCALER_OFF): {
break;
}
}
}
static inline void t0_overflow_interrupt(bool enable) {
if (enable)
TIMSK0 |= BV(TOIE0);
else
TIMSK0 &= ~BV(TOIE0);
}
static inline void t0_interrupt(enum e_timer_output output, bool enable) {
if (output & TO_A) {
if (enable)
TIMSK0 |= BV(OCIE0A);
else
TIMSK0 &= ~BV(OCIE0A);
}
if (output & TO_B) {
if (enable)
TIMSK0 |= BV(OCIE0B);
else
TIMSK0 &= ~BV(OCIE0B);
}
}
static inline void t0_set_ocr(enum e_timer_output output, uint8_t value) {
if (output & TO_A)
OCR0A = value;
if (output & TO_B)
OCR0B = value;
}
static inline void t0_set_out_mode(enum e_timer_output output, enum e_timer_output_mode mode) {
if (output & TO_A) {
TCCR0A &= ~(BV(COM0A1) | BV(COM0A0));
switch (mode) {
case (TOM_00): {
break;
}
case (TOM_10): {
TCCR0A |= (BV(COM0A1));
break;
}
case (TOM_01): {
TCCR0A |= (BV(COM0A0));
break;
}
case (TOM_11): {
TCCR0A |= (BV(COM0A1) | BV(COM0A0));
break;
}
}
}
if (output & TO_B) {
TCCR0A &= ~(BV(COM0B1) | BV(COM0B0));
switch (mode) {
case (TOM_00): {
break;
}
case (TOM_10): {
TCCR0A |= (BV(COM0B1));
break;
}
case (TOM_01): {
TCCR0A |= (BV(COM0B0));
break;
}
case (TOM_11): {
TCCR0A |= (BV(COM0B1) | BV(COM0B0));
break;
}
}
}
}
// OC2B => RED => PD3
// OC0B => GREEN => PD5
// OC0A => BLUE => PD6
#endif /* TIMER0_H */
/*
// OC2B = PD3 → output
DDRD |= BV(DDD3) | BV(DDD5) | BV(DDD6);
// Fast PWM (8-bit): WGM22:0 = 0b011
TCCR0A = BV(WGM00) | BV(WGM01);
TCCR0A |= BV(COM0B1);
// 50% duty cycle
OCR0B = 128;
// Start timer, prescaler = 64
TCCR0B = BV(CS02);
*/

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#ifndef TIMER1_H
#define TIMER1_H
#include <avr/io.h>
#include "mystd.h"
#include "timer_global.h"
static inline void t1_init_fpwm_14(e_timer_prescaler prescaler) {
// Fast PWM (8-bit): WGM22:0 = 0b011
TCCR1A = BV(WGM11);
TCCR1B = BV(WGM12) | BV(WGM13);
// set the correct prescaler
switch (prescaler) {
case (PRESCALER_1): {
TCCR1B |= (BV(CS10));
break;
}
case (PRESCALER_8): {
TCCR1B |= (BV(CS11));
break;
}
case (PRESCALER_64): {
TCCR1B |= (BV(CS11) | BV(CS10));
break;
}
case (PRESCALER_256): {
TCCR1B |= (BV(CS12));
break;
}
case (PRESCALER_1024): {
TCCR1B |= (BV(CS12) | BV(CS10));
break;
}
case (PRESCALER_OFF): {
break;
}
}
}
static inline void t1_init_ctc_4(e_timer_prescaler prescaler) {
// CTC mode 4
TCCR1A = 0;
TCCR1B = BV(WGM12);
// set the correct prescaler
switch (prescaler) {
case (PRESCALER_1): {
TCCR1B |= (BV(CS10));
break;
}
case (PRESCALER_8): {
TCCR1B |= (BV(CS11));
break;
}
case (PRESCALER_64): {
TCCR1B |= (BV(CS11) | BV(CS10));
break;
}
case (PRESCALER_256): {
TCCR1B |= (BV(CS12));
break;
}
case (PRESCALER_1024): {
TCCR1B |= (BV(CS12) | BV(CS10));
break;
}
case (PRESCALER_OFF): {
break;
}
}
}
static inline void t1_set_counter(uint16_t val) {
TCNT1 = val;
}
static inline void t1_set_icr1(uint16_t value) {
ICR1 = value;
}
static inline void t1_overflow_interrupt(bool enable) {
if (enable)
TIMSK1 |= BV(TOIE1);
else
TIMSK1 &= ~BV(TOIE1);
}
static inline void t1_interrupt(enum e_timer_output output, bool enable) {
if (output & TO_A) {
if (enable)
TIMSK1 |= BV(OCIE1A);
else
TIMSK1 &= ~BV(OCIE1A);
}
if (output & TO_B) {
if (enable)
TIMSK1 |= BV(OCIE1B);
else
TIMSK1 &= ~BV(OCIE1B);
}
}
static inline void t1_set_ocr(enum e_timer_output output, uint16_t value) {
if (output & TO_A)
OCR1A = value;
if (output & TO_B)
OCR1B = value;
}
static inline void t1_set_out_mode(enum e_timer_output output, enum e_timer_output_mode mode) {
if (output & TO_A) {
TCCR1A &= ~(BV(COM1A1) | BV(COM1A0));
switch (mode) {
case (TOM_00): {
break;
}
case (TOM_10): {
TCCR1A |= (BV(COM1A1));
break;
}
case (TOM_01): {
TCCR1A |= (BV(COM1A0));
break;
}
case (TOM_11): {
TCCR1A |= (BV(COM1A1) | BV(COM1A0));
break;
}
}
}
if (output & TO_B) {
TCCR1A &= ~(BV(COM1B1) | BV(COM1B0));
switch (mode) {
case (TOM_00): {
break;
}
case (TOM_10): {
TCCR1A |= (BV(COM1B1));
break;
}
case (TOM_01): {
TCCR1A |= (BV(COM1B0));
break;
}
case (TOM_11): {
TCCR1A |= (BV(COM1B1) | BV(COM1B0));
break;
}
}
}
}
// OC2B => RED => PD3
// OC0B => GREEN => PD5
// OC0A => BLUE => PD6
#endif /* TIMER1_H */

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#ifndef TIMER2_H
# define TIMER2_H
# include <avr/io.h>
# include "mystd.h"
# include "timer_global.h"
static inline void t2_init_fpwm_3(e_timer_prescaler prescaler) {
// Fast PWM (8-bit): WGM22:0 = 0b011
TCCR2A = BV(WGM20) | BV(WGM21);
// reset to zero -> timer off
TCCR2B &= ~(BV(CS22) | BV(CS21) | BV(CS20));
// set the correct prescaler
switch (prescaler) {
case (PRESCALER_1): {
TCCR2B |= (BV(CS20));
break;
}
case (PRESCALER_8): {
TCCR2B |= (BV(CS21));
break;
}
case (PRESCALER_64): {
TCCR2B |= (BV(CS21) | BV(CS20));
break;
}
case (PRESCALER_256): {
TCCR2B |= (BV(CS22));
break;
}
case (PRESCALER_1024): {
TCCR2B |= (BV(CS22) | BV(CS20));
break;
}
case (PRESCALER_OFF): {
break;
}
}
}
static inline void t2_overflow_interrupt(bool enable) {
if (enable)
TIMSK2 |= BV(TOIE2);
else
TIMSK2 &= ~BV(TOIE2);
}
static inline void t2_interrupt(enum e_timer_output output, bool enable) {
if (output & TO_A) {
if (enable)
TIMSK2 |= BV(OCIE2A);
else
TIMSK2 &= ~BV(OCIE2A);
}
if (output & TO_B) {
if (enable)
TIMSK2 |= BV(OCIE2B);
else
TIMSK2 &= ~BV(OCIE2B);
}
}
static inline void t2_set_ocr(enum e_timer_output output, uint8_t value) {
if (output & TO_A)
OCR2A = value;
if (output & TO_B)
OCR2B = value;
}
static inline void t2_set_out_mode(enum e_timer_output output, enum e_timer_output_mode mode) {
if (output & TO_A) {
TCCR2A &= ~(BV(COM2A1) | BV(COM2A0));
switch (mode) {
case (TOM_00): {
break;
}
case (TOM_10): {
TCCR2A |= (BV(COM2A1));
break;
}
case (TOM_01): {
TCCR2A |= (BV(COM2A0));
break;
}
case (TOM_11): {
TCCR2A |= (BV(COM2A1) | BV(COM2A0));
break;
}
}
}
if (output & TO_B) {
TCCR2A &= ~(BV(COM2B1) | BV(COM2B0));
switch (mode) {
case (TOM_00): {
break;
}
case (TOM_10): {
TCCR2A |= (BV(COM2B1));
break;
}
case (TOM_01): {
TCCR2A |= (BV(COM2B0));
break;
}
case (TOM_11): {
TCCR2A |= (BV(COM2B1) | BV(COM2B0));
break;
}
}
}
}
// OC2B => RED => PD3
// OC0B => GREEN => PD5
// OC0A => BLUE => PD6
#endif /* TIMER0_H */
/*
// OC2B = PD3 → output
DDRD |= BV(DDD3) | BV(DDD5) | BV(DDD6);
// Fast PWM (8-bit): WGM22:0 = 0b011
TCCR2A = BV(GM20) | BV(GM21);
TCCR2A |= BV(COM2B1);
// 50% duty cycle
OCR0B = 128;
// Start timer, prescaler = 64
TCCR2B = BV(CS22);
*/

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#ifndef TIMER_GLOBAL_H
#define TIMER_GLOBAL_H
typedef enum e_timer_prescaler {
PRESCALER_OFF = 0,
PRESCALER_1 = 1,
PRESCALER_8 = 8,
PRESCALER_64 = 64,
PRESCALER_256 = 256,
PRESCALER_1024 = 1024,
} e_timer_prescaler;
typedef enum e_timer_output {
TO_A = (1 << 0),
TO_B = (1 << 1),
} e_timer_output;
typedef enum e_timer_output_mode {
TOM_00,
TOM_01,
TOM_10,
TOM_11,
} e_timer_output_mode;
#endif /* TIMER_GLOBAL_H */

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#ifndef UART_H
#define UART_H
#include "mystd.h"
void uart_init(void);
void uart_tx(char data);
void uart_sendstring(const char* str);
void uart_send_u8(uint8_t val);
void uart_send_u16(uint16_t val);
void uart_send_u32(uint32_t val);
void uart_send_i16(int16_t val);
void uart_send_u8_hex(uint8_t val);
void uart_send_u16_hex(uint16_t val);
static inline void print_hex_value(char c)
{
uart_send_u8_hex(c);
}
char uart_rx(void);
#endif /* UART_H */

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#ifndef UTILS_H
#define UTILS_H
#include "mystd.h"
void delay_ms(uint16_t count);
void ft_bzero(void* data, uint16_t size);
uint8_t ft_stridx(const char* str, char chr);
uint8_t ft_ftoa(float val, char* out, uint16_t precision);
void* ft_memcpy(void* dest, void* src, uint16_t len);
bool ft_memcmp(void* s1, void* s2, uint16_t len);
// return -1 on not hex digit
uint8_t is_hex_digit(char chr);
#endif /* UTILS_H */