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feat(ex01): done

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Maix0 2026-04-24 14:24:50 +02:00
parent 24e2e0f76f
commit b7580c043c
23 changed files with 1453 additions and 0 deletions
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168
ex01/include/timer0.h Normal file
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#ifndef TIMER0_H
# define TIMER0_H
# include <avr/io.h>
# include "mystd.h"
# include "timer_global.h"
static inline void t0_init_ctc_2(e_timer_prescaler prescaler) {
// Fast PWM (8-bit): WGM22:0 = 0b011
TCCR0A = BV(WGM01);
// reset to zero -> timer off
TCCR0B &= ~(BV(CS02) | BV(CS01) | BV(CS00));
// set the correct prescaler
switch (prescaler) {
case (PRESCALER_1): {
TCCR0B |= (BV(CS00));
break;
}
case (PRESCALER_8): {
TCCR0B |= (BV(CS01));
break;
}
case (PRESCALER_64): {
TCCR0B |= (BV(CS01) | BV(CS00));
break;
}
case (PRESCALER_256): {
TCCR0B |= (BV(CS02));
break;
}
case (PRESCALER_1024): {
TCCR0B |= (BV(CS02) | BV(CS00));
break;
}
case (PRESCALER_OFF): {
break;
}
}
}
static inline void t0_init_fpwm_3(e_timer_prescaler prescaler) {
// Fast PWM (8-bit): WGM22:0 = 0b011
TCCR0A = BV(WGM00) | BV(WGM01);
// reset to zero -> timer off
TCCR0B &= ~(BV(CS02) | BV(CS01) | BV(CS00));
// set the correct prescaler
switch (prescaler) {
case (PRESCALER_1): {
TCCR0B |= (BV(CS00));
break;
}
case (PRESCALER_8): {
TCCR0B |= (BV(CS01));
break;
}
case (PRESCALER_64): {
TCCR0B |= (BV(CS01) | BV(CS00));
break;
}
case (PRESCALER_256): {
TCCR0B |= (BV(CS02));
break;
}
case (PRESCALER_1024): {
TCCR0B |= (BV(CS02) | BV(CS00));
break;
}
case (PRESCALER_OFF): {
break;
}
}
}
static inline void t0_overflow_interrupt(bool enable) {
if (enable)
TIMSK0 |= BV(TOIE0);
else
TIMSK0 &= ~BV(TOIE0);
}
static inline void t0_interrupt(enum e_timer_output output, bool enable) {
if (output & TO_A) {
if (enable)
TIMSK0 |= BV(OCIE0A);
else
TIMSK0 &= ~BV(OCIE0A);
}
if (output & TO_B) {
if (enable)
TIMSK0 |= BV(OCIE0B);
else
TIMSK0 &= ~BV(OCIE0B);
}
}
static inline void t0_set_ocr(enum e_timer_output output, uint8_t value) {
if (output & TO_A)
OCR0A = value;
if (output & TO_B)
OCR0B = value;
}
static inline void t0_set_out_mode(enum e_timer_output output, enum e_timer_output_mode mode) {
if (output & TO_A) {
TCCR0A &= ~(BV(COM0A1) | BV(COM0A0));
switch (mode) {
case (TOM_00): {
break;
}
case (TOM_10): {
TCCR0A |= (BV(COM0A1));
break;
}
case (TOM_01): {
TCCR0A |= (BV(COM0A0));
break;
}
case (TOM_11): {
TCCR0A |= (BV(COM0A1) | BV(COM0A0));
break;
}
}
}
if (output & TO_B) {
TCCR0A &= ~(BV(COM0B1) | BV(COM0B0));
switch (mode) {
case (TOM_00): {
break;
}
case (TOM_10): {
TCCR0A |= (BV(COM0B1));
break;
}
case (TOM_01): {
TCCR0A |= (BV(COM0B0));
break;
}
case (TOM_11): {
TCCR0A |= (BV(COM0B1) | BV(COM0B0));
break;
}
}
}
}
// OC2B => RED => PD3
// OC0B => GREEN => PD5
// OC0A => BLUE => PD6
#endif /* TIMER0_H */
/*
// OC2B = PD3 → output
DDRD |= BV(DDD3) | BV(DDD5) | BV(DDD6);
// Fast PWM (8-bit): WGM22:0 = 0b011
TCCR0A = BV(WGM00) | BV(WGM01);
TCCR0A |= BV(COM0B1);
// 50% duty cycle
OCR0B = 128;
// Start timer, prescaler = 64
TCCR0B = BV(CS02);
*/