Add verilog and systemrdl grammars to the docs

This commit is contained in:
Max Brunsfeld 2019-06-13 11:51:53 -07:00
parent 80b785daee
commit b2e3105acb

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@ -41,7 +41,9 @@ Parsers for these languages are fairly complete:
* [Python](https://github.com/tree-sitter/tree-sitter-python)
* [Ruby](https://github.com/tree-sitter/tree-sitter-ruby)
* [Rust](https://github.com/tree-sitter/tree-sitter-rust)
* [SystemRDL](https://github.com/SystemRDL/tree-sitter-systemrdl)
* [TypeScript](https://github.com/tree-sitter/tree-sitter-typescript)
* [Verilog](https://github.com/tree-sitter/tree-sitter-verilog)
Parsers for these languages are in development: